Open source hardware

VROOM! - high end RISC-V core

Executive summary

• Goal: Very high end RISC-V implementation – cloud server class
• Out of order, super scalar, speculative
• RV64-IMAFDCHB(V)
• Up to 8 IPC (instructions per clock) peak, goal ~4 average on ALU heavy work
• 2-way simultaneous multithreading capable
• Multi-core
• Currently boots Linux on an AWS-FPGA instance
• Early (low) dhrystone numbers: ~2 DMips/MHz - still a work in progress. Goal ~5 with fully working BTC
• GPL3 – dual licensing possible

Detailed architectural presentation

Github repository

Current development platform - Xilinx VU9P on AWS/FPGA:

Architectural overview:

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